Dirk Heilig
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0e98742706
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fix logic
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2024-04-16 00:24:14 +02:00 |
Dirk Heilig
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2717264ff4
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add colorscad
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2024-04-16 00:21:15 +02:00 |
Dirk Heilig
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22674dd482
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set preview as default
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2024-04-01 15:17:59 +02:00 |
Dirk Heilig
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ae76625ca2
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add missing parts
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2024-04-01 15:12:46 +02:00 |
Dirk Heilig
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15267fb7d3
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use refinings out of e4ee70bc36 , add preview
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2024-04-01 12:41:30 +02:00 |
Dirk Heilig
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4d4736360d
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run both files ofr one model in parallel, surpress openscad output
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2024-03-31 22:26:02 +02:00 |
Dirk Heilig
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9cb9f10090
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init
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2024-03-31 22:20:04 +02:00 |